Tran­sient­ly Pow­ered Com­put­ers (TPCs) are a new class of bat­tery­less embed­ded sys­tems that depend sole­ly on ener­gy har­vest­ed from exter­nal sources for per­form­ing com­pu­ta­tions. Enabling long-run­ning com­pu­ta­tions on TPCs is a major chal­lenge due to the high­ly inter­mit­tent nature of the pow­er sup­ply (often bursts of < 100ms), result­ing in fre­quent sys­tem reboots. Pri­or work seeks to address this issue by fre­quent­ly check­point­ing sys­tem state in flash mem­o­ry, pre­serv­ing it across pow­er cycles. How­ev­er, this involves a sub­stan­tial over­head due to the high erase/write times of flash mem­o­ry. This arti­cle pro­pos­es the use of Fer­ro­elec­tric RAM (FRAM), an emerg­ing non­volatile mem­o­ry tech­nol­o­gy that com­bines the ben­e­fits of SRAM and flash, to seam­less­ly enable long-run­ning com­pu­ta­tions in TPCs. We pro­pose a light­weight, in-situ check­point­ing tech­nique for TPCs using FRAM that con­sumes only 30nJ while decreas­ing the time tak­en for sav­ing and restor­ing a check­point to only 21.06μs, which is over two orders of mag­ni­tude low­er than the cor­re­spond­ing over­head using flash. We have imple­ment­ed and eval­u­at­ed our tech­nique, Quick­Re­call, using the TI MSP430FR5739 FRAM-enabled micro­con­troller. Exper­i­men­tal results show that our high­ly-effi­cient check­point­ing trans­late to sig­nif­i­cant speedup (1.25x — 8.4x) in pro­gram exe­cu­tion time and reduc­tion (∼3x) in appli­ca­tion-lev­el ener­gy consumption.

• RESEARCH PUBLICATION