Hardware-Software Approach for Transparent Network Monitoring in Wireless Sensor Networks

The lack of post-deploy­ment vis­i­bil­i­ty into sys­tem oper­a­tion is one of the major chal­lenges in ensur­ing reli­able oper­a­tion of remote­ly deployed embed­ded sys­tems such as wire­less sen­sor nodes. Over the years, many soft­ware-based solu­tions (in the form of debug­ging tools and pro­to­cols) have been pro­posed for in-situ sys­tem mon­i­tor­ing. How­ev­er, all of them share the trait that the mon­i­tor­ing func­tion­al­i­ty is imple­ment­ed as soft­ware exe­cut­ing on the same embed­ded proces­sor that the main appli­ca­tion exe­cutes on. This is a poor design choice from a reli­a­bil­i­ty per­spec­tive. We make the case for a joint hard­ware-soft­ware solu­tion to this prob­lem and advo­cates the use of a ded­i­cat­ed reli­a­bil­i­ty co-proces­sor that is tasked with mon­i­tor­ing the oper­a­tion of the embed­ded sys­tem. As an embod­i­ment of this design prin­ci­ple, we present Spi-Snoop­er, a co-proces­sor-aug­ment­ed hard­ware plat­form specif­i­cal­ly designed for net­work mon­i­tor­ing. Spi-Snoop­er is com­plete­ly cross-com­pat­i­ble with the Telos wire­less sen­sor nodes from an oper­a­tional stand­point and is based on a nov­el hard­ware archi­tec­ture that enables trans­par­ent snoop­ing of the com­mu­ni­ca­tion bus between the main proces­sor and the radio of the wire­less embed­ded sys­tem. The accom­pa­ny­ing soft­ware archi­tec­ture pro­vides a pow­er­ful tool for mon­i­tor­ing, log­ging, and even con­trol­ling all the com­mu­ni­ca­tion that takes place between the main proces­sor and the radio. We present a rig­or­ous eval­u­a­tion of our pro­to­type and demon­strate its util­i­ty using a vari­ety of usage scenarios.
  1. Moham­mad Saj­jad Hos­sain, Woo Suk Lee, and Vijay Raghu­nathan, “SPI-SNOOPER: a hard­ware-soft­ware approach for trans­par­ent net­work mon­i­tor­ing in wire­less sen­sor net­works,” Pro­ceed­ing of the 8th IEEE/ACM/IFIP inter­na­tion­al con­fer­ence on hardware/software code­sign and sys­tem syn­the­sis (CODES+ISSS 2012), pp.53–62, Tem­pere, Fin­land, Oct 2012.